A reconfigurable logic circuit typified by a field programmable gate array (FPGA) achieves a predetermined logic (circuit configuration) based on data stored in a configuration memory.
A multi-context configuration memory (MCM) comprises a plurality of memory cells and a single output terminal, and outputs therefrom data held in a selected one of the plurality of memory cells. There is a case where a reconfigurable logic circuit provided with the MCM is referred to as a multi-context device. It can store a plurality of circuit configuration information, and switch a circuit configuration in accordance with a context switching signal. The multi-context device can further increase a utilization efficiency of a logic circuit portion, as the number of contexts to be stored increases.
Memory cells in the MCM each comprise, e.g., a static random access memory (SRAM). Since the SRAM includes six transistors, its cell area is relatively large. In this case, if the number of contexts is increased, the area of the MCM is rapidly increased. It is therefore hard to increase the number of contexts. Furthermore, since the SRAM is volatile, data stored in the configuration memory is lost when a power supply turns off. Thus, it is impossible to apply a technique in which in a standby mode, a power supply turns off in order to lower the power consumption.
Furthermore, a nonvolatile memory is known which has a circuit configuration similar to that of an SRAM, and uses a method of modulating a threshold voltage due to a channel hot electron injection. This nonvolatile memory comprises at least six transistors, and thus has a relatively large cell area as in the SRAM.
Therefore, even if the nonvolatile memory is applied to an MCM, it is not possible to solve a problem in which the area of the MCM is rapidly increased as the number of contexts is increased.
In view of the above circumferences, it is hoped that an MCM having a small cell area and including nonvolatile memory cells will be developed.